Chinese Foundries Multiply Exposure Steps to Defeat EUV Blockade

Export controls have prevented ASML from shipping its extreme ultraviolet lithography machines to China, forcing local manufacturers to rely on older deep ultraviolet equipment. This reliance on DUV tools allows Chinese firms to produce advanced silicon, but the process requires multiple exposures that increase costs and defect rates.

ASML is the sole manufacturer of EUV machines, which use 13.5 nanometer wavelength light to print fine features. Analysts estimate that the gap in EUV access between China and Western competitors is currently five years or more. Despite this limitation, Chinese foundries have achieved notable progress using alternative methods.

A teardown of the Huawei Mate 60 Pro in 2023 revealed that its Kirin 9000S processor was manufactured by SMIC using a second-generation 7 nanometer class process without EUV. More recent analysis indicates that SMIC has moved its DUV-based process closer to the density of 5 nanometer manufacturing, although it still lags behind TSMC and Samsung.

The technique used is multiple patterning, where complex layers are split into simpler patterns and built up step by step. Chris Mack, co-founder and CTO of Fractilia, noted that industry standards suggest three exposures on a 193 immersion tool cost about the same as one EUV exposure. However, at four masks, EUV becomes the cheaper option.

Quality issues arise because each new pattern must align precisely with previous etching. More exposures lead to accumulated overlay errors and process variation. Designers can add space around features to compensate, which enlarges the chip and reduces the number of dies per wafer. Mack stated, "You don't sell wafers, you sell die."

Morgan Stanley estimated in a June report that CXMT, a Chinese DRAM maker, produces only about one-third as many bits per wafer as Western rivals. The bank described lithography access as a hard ceiling for Chinese memory development. Mack cautioned that node labels like 5nm have limited meaning without context, and that SMIC's N+3 process remains less scaled than established 5nm processes.

DUV technology still has capacity for advancement. Micron developed its 1-alpha DRAM without EUV, using multiple patterning and tight process control. Mack said Micron pushed 193 immersion technology farther than other memory makers. Morgan Stanley considers CXMT's planned move to 1-alpha DRAM for HBM3e achievable without EUV.

Douglas Fuller, a researcher at Copenhagen Business School, expects advanced packaging to allow firms to use DUV for the latest DRAM generations by the end of the decade. Mack added that China could make significant progress if it had the full 193 immersion ecosystem, though he noted memory is easier to manufacture than logic chips.

Micron eventually switched to EUV for its 1-gamma DRAM, which offers more than 30% greater bit density per wafer than the previous 1-beta generation. While EUV has its own drawbacks, such as stochastic effects, Mack said he would be hard pressed to believe a 3nm or 2nm node could be economically viable without it.

Chinese chipmakers will continue pushing DUV while accepting larger dies, poorer yields, or longer manufacturing times. Morgan Stanley assumes CXMT will stay on 1-alpha without EUV but expects its share of global DRAM bit supply to rise from 14% in 2026 to 16% in 2028. The bank also projects China's AI chip self-sufficiency to increase from 42% in 2025 to 70% by 2030.